FPGA创新设计赛道

{{ t('noBanner') || '暂无轮播图' }}

{{ t('errorBannerLoad') }}

{{ t('retry') }}

{{ t('competitionProcess') }}

{{ formatStepNumber(index) }}

{{ step.titleText }}

{{ step.timeRangeText }}

· {{ event }}

{{ t('errorProcessLoad') }}

{{ t('retry') }}

{{ t('noticeTitle') }}

{{ featuredNews[0].monthDay || '' }}

{{ featuredNews[0].title }}

{{ t('errorNoticeLoad') }}

{{ t('retry') }}

{{ item.monthDay || '' }} {{ item.year || '' }}

{{ t('noticeLatest') }}
{{ item.title }}

{{ t('organizersTitle') }}

{{ t('errorOrganizersLoad') }}

{{ t('retry') }}

{{ t('galleryTitle') }}

{{ item.title }}

{{ t('faqTitle') }}

{{ t('all') }}

{{ cat.name }}

{{ t('faqTab1') }}

{{ t('faqTab2') }}

{{ t('faqTab3') }}

{{ t('faqTab4') }}

{{ t('all') }}

{{ cat.name }}

{{ t('errorFaqLoad') }}

{{ t('retry') }}